receiving buffer
英 [rɪˈsiːvɪŋ ˈbʌfə(r)]
美 [rɪˈsiːvɪŋ ˈbʌfər]
网络 接收缓冲器; 接收缓冲区
双语例句
- If the transport layer agent has the functions of sending and receiving the real data, then the buffer area is needed.
如果传输层代理具有发送和接收真实数据的功能，那么就需要具有缓冲区。 - If the structure is receiving information about a column, this member specifies the address of the buffer that receives the column header text.
如果收到有关的结构是一列信息，该成员指定的缓冲区，它接收的列标题文本的地址。 - Receiving Systems Analysis on Buffer Size of Receiver in Data Link Layer of Fast Ethernet
快速以太网链路层接收方缓冲器容量分析 - The receiving point adopts data buffer mechanism to avoid the pause caused by delay of network.
接收端采用数据缓冲机制，避免了由于网络延时等待音频数据而产生的话音停顿。 - Firstly, we try to make best use of high-speed serial communication capability of the hardware through methods such as: modifying interface speed of serial port driver, improving the receiving flow; utilizing the mechanism of buffer and adding the mechanism of flow control.
首先通过修改串行口驱动程序中的接口速率、改进接收流程、利用缓冲机制以及添加流控机制，充分利用了硬件的高速串行通信能力； - Then the main chapter comes, which describes the frame of program play software, including play model, channel list receiving model, menu system model and the adaptive buffer control algorithm.
第三章是本文的重点，描述了数字视频终端中节目播放软件的框架结构及节目播放模块、频道列表接收模块、菜单框架模块和自适应缓冲控制算法的设计和实现。 - This paper first provides the transaction committing flow chart of a distributed multidatabase system architecture. Then it gives the database design of the sending buffer and receiving buffer, and describes the relations among the tables.
首先给出了一种分布式多数据库系统结构的事务提交流程，其次对数据通讯的发送缓冲和接收缓冲进行了数据库设计，对其中的关系进行了描述。 - The network loading condition was to be predicted by analyzing the occurrence ratio of packet drop-out during real-time video-stream transmission and dynamically adjusting the size of receiving buffer according to network loading.
通过分析实时视频流传输过程中丢包事件的发生率来预测网络负载状况，并根据网络负载动态调整接收缓冲区大小。 - Or send speed can be determined by the known receiving buffer.
或者根据接收缓冲区的大小，确定发送速率。 - The hard real-time serial receiving program which dealt with totally four different data frames was designed with four techniques: data frame picking-up in interrupt serve program, finite state machine theory, buffer sharing and code optimizing.
运用中断服务程序就地帧识别、有限状态机、缓存共用和代码优化技术，设计了具有多通讯协议的强实时性串行通讯接收程序。 - A formula for calculating receiving buffer length was proposed, based on the analysis and research on network parameters, such as jitter, average speed and packet loss fraction.
在分析研究延时抖动、平均速率和丢包率等网络参数的基础上，给出客户端接收缓冲区长度估算公式。根据客户端反馈网络参数在服务器端实现流量控制。 - Then, the software design flow of receiving and dispatching module and the structure design of the buffer descriptor were emphasized.
着重分析了协议栈数据收发模块的软件设计流程及缓冲区的结构设计。 - The data in the sending buffer is sorted by global transaction, site and SQL order; and the data in the receiving buffer is stored as the same order and is packed to execute under the basic unit the sub-transaction of the physical site.
对于发送缓冲，它以事务、节点和SQL语序的顺序排序并传输，接收缓冲以同样的顺序存放并以子事务为基本单位执行。 - All results from every DSP, such as time and frequency values of strange points and characteristic values presenting the AE signal, are carried by CAN field bus, and finally reach receiving buffer zone of industrial control computer.
各个信号处理单元的处理结果（信号奇异点处的时频特征和信号波形的各个特征参数）都要通过CAN现场总线进行传送，最后到达上位机的接收缓冲区，由上位机进行接收。 - The downstream of the connection is synchronized against the background by modifying the receiving buffer in TCP stack to keep the correspondence of the information of the downstream in the background, improving the server ′ s property under the high load environment.
对输出流采用后台同步的方式，该方式通过修改TCP协议栈的接收缓存来保存用于同步的必要信息，以保证输出流消息的后台一致性，提高了服务端在高负荷环境下的性能。 - The MAC layer controller hardware modules are designed using Verilog hardware description language, including the transmission of the engines, receiving engines, buffer module, register module, control module and the WEP module.
采用Verilog硬件描述语言实现了MAC层控制器的硬件部分，包括发送引擎、接收引擎、缓冲区模块、寄存器模块、控制模块等模块。 - The link layer communication software in the lower layer sends data in the sending buffer to the air at the appropriate time, and receives data from the air interface and takes it into receiving buffer.
下层的链路层通信软件在合适的时间将发送缓冲区的数据发送到空中，并将从空中接收到的数据放入接收缓冲区。 - Based on FPGA technology, FPGA as core part of the video processing module, self-developed IP core, completed data receiving, scaling, and integration in frame buffer. 3.
基于FPGA技术，把FPGA作为内部视频处理模块的核心部分，自主开发了IP核，实现在帧存中完成内部视频模块数据的接收，缩放，融合等数据处理。